Four papers by U-M researchers recognized in IEEE Micro Top Picks issue
A paper authored by researchers including two CSE faculty has been recognized as one of IEEE Micro’s Top Picks from the 2021 Computer Architecture Conferences, with three more papers including CSE authors chosen as honorable mentions. Top Picks is an annual special edition of IEEE Micro magazine that acknowledges the 10-12 most significant research papers from computer architecture conferences in the past year based on novelty and potential for long-term impact.
In “An Architecture to Accelerate Computation on Encrypted Data,” the authors propose F1, the first FHE accelerator capable of executing entire fully homomorphic encryption (FHE) programs without the high overhead in an attempt to enable more widespread adoption of the method. Programmable and tailored to FHE’s characteristic complex operations on long vectors, regular computation, and challenging data movement, F1 “builds on an in-depth architectural analysis of the characteristics of FHE computations, which exposes the main challenges and reveals the design principles a programmable FHE architecture should exploit.”
The development of F1 allows for new uses of the previously inaccessible FHE by accelerating computations “by over 3-4 orders of magnitude.” The hardware and compiler are specifically designed to minimize the bottleneck of data movement while accelerating the primitive computations shared by higher-level operations using novel high-throughput FUs.
The research also looks toward the future of algorithm-hardware co-design by using specialization to fuel optimization of computations with high costs. The authors “hope [F1] will spark a virtuous cycle that will further improve performance and efficiency, ultimately making FHE an integral part of the secure computer systems of the future.
The Honorable Mentions with U-M CSE authors include “GPS: A Global Publish-Subscribe Model for Multi-GPU Memory Management” (Harini Muthukrishnan and Thomas F. Wenisch), “SquiggleFilter: An Accelerator for Portable Virus Detection” (Tim Dunn, Harisankar Sasivan, Jack Wadden, Kush Goliya, Kuan-Yu Chen, David Blaauw, Reetuparna Das, and Satish Narayanasamy), and “Superconducting Computing with Alternating Logic Elements” (Georgios Tzimpragos).